job details
Verification Engineer - New Grads
Hybrid however expectation is to be live in the Ottawa area to work with team members
Salary plus the opportunity of signing bonus of up to 15 percent, stock purchase plan, a discount of 15 percent, RRSP matching of up to 15 pecent
As per the client, please complete a questionnaire with the candidate, the document attached
20 new grads for the design center being built in Kanata
Job Duties
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Advantages
Competitive Salary
Opportunity to work with a global organization
RRSP matching of up to 5%
Full Benefits
Responsibilities
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Qualifications
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Summary
Verification Engineer - New Grads
Hybrid however expectation is to be live in the Ottawa area to work with team members
Salary plus the opportunity of signing bonus of up to 15 percent, stock purchase plan, a discount of 15 percent, RRSP matching of up to 15 pecent
As per the client, please complete a questionnaire with the candidate, the document attached
20 new grads for the design center being built in Kanata
Job Duties
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Randstad Canada is committed to fostering a workforce reflective of all peoples of Canada. As a result, we are committed to developing and implementing strategies to increase the equity, diversity and inclusion within the workplace by examining our internal policies, practices, and systems throughout the entire lifecycle of our workforce, including its recruitment, retention and advancement for all employees. In addition to our deep commitment to respecting human rights, we are dedicated to positive actions to affect change to ensure everyone has full participation in the workforce free from any barriers, systemic or otherwise, especially equity-seeking groups who are usually underrepresented in Canada's workforce, including those who identify as women or non-binary/gender non-conforming; Indigenous or Aboriginal Peoples; persons with disabilities (visible or invisible) and; members of visible minorities, racialized groups and the LGBTQ2+ community.
Randstad Canada is committed to creating and maintaining an inclusive and accessible workplace for all its candidates and employees by supporting their accessibility and accommodation needs throughout the employment lifecycle. We ask that all job applications please identify any accommodation requirements by sending an email to accessibility@randstad.ca to ensure their ability to fully participate in the interview process.
Verification Engineer - New Grads
Hybrid however expectation is to be live in the Ottawa area to work with team members
Salary plus the opportunity of signing bonus of up to 15 percent, stock purchase plan, a discount of 15 percent, RRSP matching of up to 15 pecent
As per the client, please complete a questionnaire with the candidate, the document attached
20 new grads for the design center being built in Kanata
Job Duties
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Advantages
Competitive Salary
Opportunity to work with a global organization
RRSP matching of up to 5%
Full Benefits
Responsibilities
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Qualifications
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Summary
Verification Engineer - New Grads
Hybrid however expectation is to be live in the Ottawa area to work with team members
Salary plus the opportunity of signing bonus of up to 15 percent, stock purchase plan, a discount of 15 percent, RRSP matching of up to 15 pecent
As per the client, please complete a questionnaire with the candidate, the document attached
20 new grads for the design center being built in Kanata
Job Duties
Perform IP, subsystem- and/or SOC-level verification: planning; test-bench components and infrastructure, stimulus, & coverage development; environment development; root-cause debug; and coverage closure. Technically lead client engagements and/or aide Engineering Directors in assessing, sizing, & planning projects.
Baseline skill is System Verilog and Universal Verification Methodology, new grad
Required Qualifications
Clear communication skills
Strong presentation skills, work with end clients
UVM and SystemVerilog
Strong C and C++ programming skills are very important
Shell scripting, Perl, Python, and/or Ruby one
ARM Architecture and AMBA AHB APB AXI bus protocols
High-speed I O e.g. Ethernet, PCIe, USB, SATA, and or SerDes
Efficient triage and root-cause debug capabilities
Desired Qualifications
Requirements
Must be legally eligible to work in Canada to be considered open work permit acceptable
Randstad Canada is committed to fostering a workforce reflective of all peoples of Canada. As a result, we are committed to developing and implementing strategies to increase the equity, diversity and inclusion within the workplace by examining our internal policies, practices, and systems throughout the entire lifecycle of our workforce, including its recruitment, retention and advancement for all employees. In addition to our deep commitment to respecting human rights, we are dedicated to positive actions to affect change to ensure everyone has full participation in the workforce free from any barriers, systemic or otherwise, especially equity-seeking groups who are usually underrepresented in Canada's workforce, including those who identify as women or non-binary/gender non-conforming; Indigenous or Aboriginal Peoples; persons with disabilities (visible or invisible) and; members of visible minorities, racialized groups and the LGBTQ2+ community.
Randstad Canada is committed to creating and maintaining an inclusive and accessible workplace for all its candidates and employees by supporting their accessibility and accommodation needs throughout the employment lifecycle. We ask that all job applications please identify any accommodation requirements by sending an email to accessibility@randstad.ca to ensure their ability to fully participate in the interview process.